Please wait until document has finished loading (reload)

[Donate]

-- $(lic)
-- $(help_generic)
-- $(help_local)

library ieee;
use ieee.std_logic_1164.all;
use work.armdecode.all;
use work.armpctrl.all;
use work.armpmodel.all;
use work.armcmd.all;
use work.armcmd_comp.all;

entity armcmd_cr is
  port ( 
    rst     : in  std_logic;
    clk     : in  std_logic;
    i       : in  armcmd_cr_typ_in;
    o       : out armcmd_cr_typ_out
    );
end armcmd_cr;

architecture rtl of armcmd_cr is

  type armcmd_cr_tmp_type is record
    o       : armcmd_cr_typ_out;
    off : std_logic_vector(23 downto 0);
  end record;
  type armcmd_cr_reg_type is record
    dummy      : std_logic;
  end record;
  type armcmd_cr_dbg_type is record
     dummy : std_logic;
     -- pragma translate_off
     dbg : armcmd_cr_tmp_type;
     -- pragma translate_on
  end record;
  signal r, c       : armcmd_cr_reg_type;
  signal rdbg, cdbg : armcmd_cr_dbg_type;

begin  
    
  p0: process (clk, rst, r, i  )
    variable v    : armcmd_cr_reg_type;
    variable t    : armcmd_cr_tmp_type;
    variable vdbg : armcmd_cr_dbg_type;
  begin 
    
    -- $(init(t:armcmd_cr_tmp_type))
    
    v := r;
    t.o.ctrlo := i.ctrli.ctrlo;
    t.o.ctrlo.nextinsn := '1';

    t.o.rd_src  := acm_rdnone;
    t.o.r1_src  := acm_none;

    if i.ctrli.insn.insn(ADE_MRC_MCR_C) = '1' then -- '1':MRC '0':MCR

      -- move coprocessor to arm:
      -- MRC{cond} <copro>,<opcode_1>,<rd>,<crn>,<crm>{,<opcode2>}
      -- MRC2      <copro>,<opcode_1>,<rd>,<crn>,<crm>{,<opcode2>}

      -- [frame:] 
      --
      --             RRSTG      RSSTG       EXSTG       DMSTG       MESTG       WRSTG
      --      --+-----------+-----------+-----------+-----------+-----------+----------+
      --        |           |           |           |           |           |
      --        |           |           |           |           |           |
      --        | (regread) |(regshieft)|  (aluop)  |  +(trans) |  (dcache) | +->(write)
      --        |           |           |           |           |           | |
      --        |  [copro]  |           |           |           |           | |
      --      --+-----+-----+-----------+-----------+-----------+-----------+-+--------+
      --              V                                                       |
      --         pctrl.data1 (as wrdata)  : o---------------------------------+          
      --

      t.o.rd_src  := acm_rdrrd;
    else
      
      -- move arm to coprocessor:
      -- MCR{cond} <copro>,<opcode_1>,<rd>,<crn>,<crm>{,<opcode2>}
      -- MCR2      <copro>,<opcode_1>,<rd>,<crn>,<crm>{,<opcode2>}

      -- [frame:] 
      --
      --             RRSTG      RSSTG       EXSTG       DMSTG       MESTG       WRSTG
      --      --+-----------+-----------+-----------+-----------+-----------+----------+
      --  <rd>--+-----+     |           |           |           |           |           
      --        |     |     |           |           |           |           |
      --        | (regread) |(regshieft)|  (aluop)  |   (trans) |  (dcache) | (write)
      --        |     |     |           |           |           |           | 
      --        |     |     |           |           |           |           | 
      --      --+-----+-----+-----------+-----------+-----------+-----------+----------+
      --              V                                                        
      --         pctrl.data1 (as wrdata)  : o--------------------------------->[copro]          
      
      t.o.r1_src  := acm_rrd;
    end if;
    
    if i.fromCP_busy = '1' then
      t.o.ctrlo.hold := '1';
    end if;
    
    -- reset
    if ( rst = '0' ) then
    end if;

    o <= t.o;
    
    -- pragma translate_off
    vdbg := rdbg;
    vdbg.dbg := t;
    cdbg <= vdbg;
    -- pragma translate_on  
    
  end process p0;
    
  pregs : process (clk, c)
  begin
    if rising_edge(clk) then
      r <= c;
      -- pragma translate_off
      rdbg <= cdbg;
      -- pragma translate_on
    end if;
  end process;
  
end rtl;

File /tmp/build_html/vhdl/arm/libs/armdecode.vhd used by /tmp/build_html/vhdl/arm/libs/armpctrl.vhd used by /tmp/build_html/vhdl/arm/arm_comp.vhd used by /tmp/build_html/vhdl/arm/armiu_festg.vhd used by /tmp/build_html/vhdl/arm/armiu_destg.vhd used by /tmp/build_html/vhdl/arm/armiu_destg.vhd used by /tmp/build_html/vhdl/arm/libs/armdebug.vhd used by /tmp/build_html/vhdl/arm/libs/armldst.vhd used by /tmp/build_html/vhdl/arm/armcmd_comp.vhd used by /tmp/build_html/vhdl/arm/armcmd_al.vhd used by /tmp/build_html/vhdl/arm/armcmd_sr.vhd used by /tmp/build_html/vhdl/arm/armcmd_bl.vhd used by /tmp/build_html/vhdl/arm/armcmd_ld.vhd used by /tmp/build_html/vhdl/arm/armcmd_st.vhd used by /tmp/build_html/vhdl/arm/armcmd_lm.vhd used by /tmp/build_html/vhdl/arm/armcmd_sm.vhd used by /tmp/build_html/vhdl/arm/armcmd_sw.vhd used by /tmp/build_html/vhdl/arm/armcmd_cr.vhd used by /tmp/build_html/vhdl/arm/armcmd_cs.vhd used by /tmp/build_html/vhdl/arm/armiu_drstg.vhd used by /tmp/build_html/vhdl/arm/armiu_rrstg.vhd used by /tmp/build_html/vhdl/arm/libs/armctrl.vhd used by /tmp/build_html/vhdl/arm/armiu_rsstg.vhd used by /tmp/build_html/vhdl/arm/armiu_dmstg.vhd used by /tmp/build_html/vhdl/arm/armiu_mestg.vhd

File /tmp/build_html/vhdl/arm/libs/armpctrl.vhd used by /tmp/build_html/vhdl/arm/arm_comp.vhd used by /tmp/build_html/vhdl/arm/libs/armcmd.vhd used by /tmp/build_html/vhdl/arm/libs/armldst.vhd used by /tmp/build_html/vhdl/arm/armcmd_comp.vhd used by /tmp/build_html/vhdl/arm/armcmd_al.vhd used by /tmp/build_html/vhdl/arm/armcmd_sr.vhd used by /tmp/build_html/vhdl/arm/armcmd_sr.vhd used by /tmp/build_html/vhdl/arm/armcmd_bl.vhd used by /tmp/build_html/vhdl/arm/armcmd_ld.vhd used by /tmp/build_html/vhdl/arm/armcmd_st.vhd used by /tmp/build_html/vhdl/arm/armcmd_lm.vhd used by /tmp/build_html/vhdl/arm/armcmd_sm.vhd used by /tmp/build_html/vhdl/arm/armcmd_sw.vhd used by /tmp/build_html/vhdl/arm/armcmd_cr.vhd used by /tmp/build_html/vhdl/arm/armcmd_cl.vhd used by /tmp/build_html/vhdl/arm/armcmd_cs.vhd used by /tmp/build_html/vhdl/arm/armiu_drstg.vhd used by /tmp/build_html/vhdl/arm/libs/armctrl.vhd used by /tmp/build_html/vhdl/arm/armiu_rsstg.vhd used by /tmp/build_html/vhdl/arm/armiu_exstg.vhd used by /tmp/build_html/vhdl/arm/armiu_dmstg.vhd used by /tmp/build_html/vhdl/arm/armiu_mestg.vhd used by /tmp/build_html/vhdl/arm/cp/armcp_sctrl.vhd used by /tmp/build_html/soft/doc/test/.config.vhd

File /tmp/build_html/vhdl/arm/libs/armpmodel.vhd used by /tmp/build_html/vhdl/arm/libs/armdecode.vhd used by /tmp/build_html/vhdl/arm/libs/armpctrl.vhd used by /tmp/build_html/vhdl/arm/arm_comp.vhd used by /tmp/build_html/vhdl/arm/libs/armdebug.vhd used by /tmp/build_html/vhdl/arm/libs/armdebug.vhd used by /tmp/build_html/vhdl/arm/libs/armldst.vhd used by /tmp/build_html/vhdl/arm/armcmd_al.vhd used by /tmp/build_html/vhdl/arm/armcmd_bl.vhd used by /tmp/build_html/vhdl/arm/armcmd_ld.vhd used by /tmp/build_html/vhdl/arm/armcmd_st.vhd used by /tmp/build_html/vhdl/arm/armcmd_lm.vhd used by /tmp/build_html/vhdl/arm/armcmd_sm.vhd used by /tmp/build_html/vhdl/arm/armcmd_sw.vhd used by /tmp/build_html/vhdl/arm/armcmd_cr.vhd used by /tmp/build_html/vhdl/arm/armcmd_cl.vhd used by /tmp/build_html/vhdl/arm/armcmd_cs.vhd used by /tmp/build_html/vhdl/arm/armiu_drstg.vhd used by /tmp/build_html/vhdl/arm/armiu_rrstg.vhd used by /tmp/build_html/vhdl/arm/libs/armctrl.vhd used by /tmp/build_html/vhdl/arm/armiu_rsstg.vhd used by /tmp/build_html/vhdl/arm/armiu_dmstg.vhd used by /tmp/build_html/vhdl/arm/armiu_mestg.vhd

File /tmp/build_html/vhdl/arm/libs/armcmd.vhd used by /tmp/build_html/vhdl/arm/armcmd_comp.vhd used by /tmp/build_html/vhdl/arm/armcmd_al.vhd used by /tmp/build_html/vhdl/arm/armcmd_sr.vhd used by /tmp/build_html/vhdl/arm/armcmd_bl.vhd used by /tmp/build_html/vhdl/arm/armcmd_ld.vhd used by /tmp/build_html/vhdl/arm/armcmd_st.vhd used by /tmp/build_html/vhdl/arm/armcmd_lm.vhd used by /tmp/build_html/vhdl/arm/armcmd_lm.vhd used by /tmp/build_html/vhdl/arm/armcmd_sm.vhd used by /tmp/build_html/vhdl/arm/armcmd_sw.vhd used by /tmp/build_html/vhdl/arm/armcmd_cl.vhd used by /tmp/build_html/vhdl/arm/armcmd_cl.vhd used by /tmp/build_html/vhdl/arm/armiu_drstg.vhd

File /tmp/build_html/vhdl/arm/armcmd_comp.vhd used by /tmp/build_html/vhdl/arm/armcmd_al.vhd used by /tmp/build_html/vhdl/arm/armcmd_sr.vhd used by /tmp/build_html/vhdl/arm/armcmd_bl.vhd used by /tmp/build_html/vhdl/arm/armcmd_ld.vhd used by /tmp/build_html/vhdl/arm/armcmd_st.vhd used by /tmp/build_html/vhdl/arm/armcmd_lm.vhd used by /tmp/build_html/vhdl/arm/armcmd_sm.vhd used by /tmp/build_html/vhdl/arm/armcmd_sw.vhd used by /tmp/build_html/vhdl/arm/armcmd_sw.vhd used by /tmp/build_html/vhdl/arm/armcmd_cr.vhd used by /tmp/build_html/vhdl/arm/armcmd_cl.vhd used by /tmp/build_html/vhdl/arm/armiu_drstg.vhd

File /tmp/build_html/vhdl/arm/armcmd_cr.vhd

Constant ACM_CNT_SZ defined in /tmp/build_html/vhdl/arm/libs/armcmd.vhd constant ACM_CNT_SZ : integer := 5;

Enum ade_insntyp defined in /tmp/build_html/vhdl/arm/libs/armdecode.vhd type ade_insntyp is ( ade_typmem, ade_typalu, ade_typmisc, ade_typcp );

Enum ade_decinsn defined in /tmp/build_html/vhdl/arm/libs/armdecode.vhd type ade_decinsn is ( type_arm_invalid,type_arm_nop, type_arm_mrs, type_arm_bx, type_arm_mul, type_arm_mla, type_arm_swp, type_arm_sumull, type_arm_sumlal, type_arm_strhb, type_arm_ldrhb, type_arm_and, type_arm_sub, type_arm_eor, type_arm_rsb, type_arm_add, type_arm_sbc, type_arm_adc, type_arm_msr, type_arm_teq, type_arm_cmn, type_arm_tst, type_arm_cmp, type_arm_orr, type_arm_mov, type_arm_mvn, type_arm_str1, type_arm_str2, type_arm_str3, type_arm_ldr1, type_arm_stm, type_arm_ldm, type_arm_b, type_arm_swi, type_arm_cdp, type_arm_mrc, type_arm_mcr, type_arm_stc, type_arm_ldc, type_arm_rsc, type_arm_bic, type_arm_undefined );

Enum ade_DAPRAM defined in /tmp/build_html/vhdl/arm/libs/armdecode.vhd type ade_DAPRAM is ( ade_DAPRAM_simm, -- OP2 shieft with imm ade_DAPRAM_sreg, -- OP2 shieft with reg ade_DAPRAM_immrot -- OP2 immidiate rotated );

Enum ade_LDSTAMxLSV4AM defined in /tmp/build_html/vhdl/arm/libs/armdecode.vhd type ade_LDSTAMxLSV4AM is ( ade_LDSTAMxLSV4AM_imm, -- addr v1 imm -- addr v4 imm ade_LDSTAMxLSV4AM_reg -- addr v1 reg (shieft with imm) -- addr v4 reg );

Enum icycletype defined in /tmp/build_html/vhdl/peripherals/mem/sdmctrl.vhd type icycletype is (iidle, pre, ref1, ref2, lmode, finish);

Enum ade_pos defined in /tmp/build_html/vhdl/arm/libs/armdecode.vhd type ade_pos is ( ade_pre, -- pre indexed ade_post -- post indexed );

Enum ash_sdir defined in /tmp/build_html/vhdl/arm/libs/armshiefter.vhd type ash_sdir is ( ash_sdir_snone, -- no shieft ash_sdir_slsl, -- LSL #: logical shieft left ash_sdir_slsr, -- LSR #: logical shieft righ ash_sdir_sasr, -- ASR #: arithmetic shieft left ash_sdir_sror, -- ROR #: rotate ash_sdir_srrx -- RRX #: rotate 1 with carry );

Type ade_amode defined in /tmp/build_html/vhdl/arm/libs/armdecode.vhd type ade_amode is record DAPRAM_typ : ade_DAPRAM; LDSTAM_typ : ade_LDSTAMxLSV4AM; LSV4AM_typ : ade_LDSTAMxLSV4AM; LDSTAMxLSV4AM_pos : ade_pos; DAPRAMxLDSTAM_sdir : ash_sdir; LDSTAMxLSV4AM_uacc : std_logic; LDSTAMxLSV4AM_wb : std_logic; end record;

Type ade_insn defined in /tmp/build_html/vhdl/arm/libs/armdecode.vhd type ade_insn is record pc_8 : std_logic_vector(31 downto 0); insn : std_logic_vector(31 downto 0); insntyp : ade_insntyp; decinsn : ade_decinsn; am : ade_amode; valid : std_logic; id : std_logic_vector(2 downto 0); end record;

Type acm_ctrlout defined in /tmp/build_html/vhdl/arm/libs/armcmd.vhd type acm_ctrlout is record nextinsn : std_logic; nextcnt : std_logic; hold : std_logic; end record;

Type acm_ctrlin defined in /tmp/build_html/vhdl/arm/libs/armcmd.vhd type acm_ctrlin is record cnt : std_logic_vector(ACM_CNT_SZ-1 downto 0); insn : ade_insn; ctrlo : acm_ctrlout; -- preinitialized ctrlo end record;

Type armcmd_cr_typ_in defined in /tmp/build_html/vhdl/arm/armcmd_comp.vhd type armcmd_cr_typ_in is record ctrli : acm_ctrlin; fromCP_busy : std_logic; end record;

Enum acm_regsrc defined in /tmp/build_html/vhdl/arm/libs/armcmd.vhd type acm_regsrc is ( acm_none, acm_rrn, acm_rrm, acm_rrd, acm_rrs, acm_local );

Enum acm_rdsrc defined in /tmp/build_html/vhdl/arm/libs/armcmd.vhd type acm_rdsrc is ( acm_rdnone, acm_rdrrd, acm_rdrrn, acm_rdlocal, acm_rdpc, acm_rdlink );

Type armcmd_cr_typ_out defined in /tmp/build_html/vhdl/arm/armcmd_comp.vhd type armcmd_cr_typ_out is record ctrlo : acm_ctrlout; r1_src : acm_regsrc; -- (micro.r1) rd_src : acm_rdsrc; -- (pctrl.wr.wrop_rd) end record;

Type armcmd_cr_tmp_type defined in /tmp/build_html/vhdl/arm/armcmd_cr.vhd type armcmd_cr_tmp_type is record o : armcmd_cr_typ_out; off : std_logic_vector(23 downto 0); end record;

Type armcmd_cr_reg_type defined in /tmp/build_html/vhdl/arm/armcmd_cr.vhd type armcmd_cr_reg_type is record dummy : std_logic; end record;

Type armcmd_cr_dbg_type defined in /tmp/build_html/vhdl/arm/armcmd_cr.vhd type armcmd_cr_dbg_type is record dummy : std_logic; -- pragma translate_off dbg : armcmd_cr_tmp_type; -- pragma translate_on end record;

Constant ADE_MRC_MCR_C defined in /tmp/build_html/vhdl/arm/libs/armdecode.vhd constant ADE_MRC_MCR_C : integer := 20;

Enum istatetype defined in /tmp/build_html/vhdl/sparc/mmu_icache.vhd type istatetype is (idle, trans, streaming, stop);

Enum astates defined in /tmp/build_html/vhdl/sparc/mmu_acache.vhd type astates is (idle, dcache, icache, mmu);

If you have question mail to: Konrad Eisele<eiselekd@web.de>, created: Wed Apr 14 13:07:33 WEDT 2004 ;
This is part of the Core distribution